The first important work was on an architecture 7401 beeing a computer for the swedish airforce Viggen. This was one of the first RISC-processors ever. The processor was as small as a bible, but had the capacity of 2 Mips. Parallelism with hard processes and interprocess communication was introduced. Context switches where performed in about 2us. The microarchitecture was stack oriented controlled by reverse polish notation.
In a next step the architecture 7503 was developed. It was aimed to be a general purpose architecture for many applications, especially real-time embedded systems. The architecture was a CISC-architecture controlling a core being a RISC-architecture. A network of such processors formed a multiprocessor. In this structure hard processes and non linear memory was included. The processors had cache memories. A totally different cache coherence protocol than current were used. It was possible due to the use of hard processes and non linear memory.
The microarchitecture was new, because it was aimed for custom integrated circuits at year 1978. The circuits was not large at that time (approximately 4000 gates), therefore the processor consisted of some memories and some few custom circuits. All datatypes were byte-strings of almost arbitrary size (beware of a 256 byte real). Execution wase based on byte streams. Floating point performance was around 2us.
Year 1977 in a project 8000 a local area network between something similar to workstations, but very primitive, was designed. An alternative to the ethernet protocol was used.
Year 1986 a large project aimed for a massive parallel processor rp8601 started. It was based on an applicative semantics designed for real-time embeded systems. The execution mechanism was reduction and lazy evalutaion. This project lasted almost 10 years. It gave a lot of experience in such mechanisms and applicative languages.